Dear IP User,
In this issue we will provide the SoC (System-On-Chip) Community with our latest Analog /Mixed-Signal news:
With many years of expertise and working with market leaders, we can help you select the most suitable IP for your system.
When designing your next Portable GPS Car Navigation System, you can consider the broad range of Silicon
IP and expertise that Chipidea has to offer (Chipidea Silicon IP in orange - diagram below).
Portable GPS Car Navigation System general block diagram
Chipidea presents (CI10084tg) highly integrated low-noise RF front-end IP for GPS (Global Positioning System) receiver in the L1 band, suitable for portable consumer and automotive applications, supporting also Galileo.
It is designed to work with a base-band IC with or without embedded ADC. Uses a Low-IF architecture of 4.092 MHz.
The Fractional-N synthesizer provides a very flexible frequency plan, supporting a wide range of crystal oscillators.
System control and status monitoring is done over a serial interface.
Optimized for low power consumption uses few and low-cost external components and it is instantiated in 0.18um CMOS process.
Key Features: Low IF architecture. LNA included. Low External Component Count for convenient integration in SIP (System-in-Package). Fully Integrated Fractional-N RF Synthesizer, supporting different reference frequencies. Multiple Power-Saving Modes. Integrated LDOs for analog supply. Single supply: 1.8V (allowing 3V supply with an integrated Regulator to 1.8V). Consumption: 19 mA (15 mA w/o LNA). Chip Area (with IOs): 4 mm2.
( CI10084tg) GPS receiver RF front-end block diagram
The new Chipidea Audio IP cores in TSMC 65nm, offers different audio features in different IP answering to your audio needs
in every step of the integration process, being specifically designed to address different application requirements and
different IC cost premises.
(CI9605tn)
24 bit 96dB Dynamic Range 8 to 192kHz Sampling Rate Stereo Audio Codec , 65 nm CMOS , is a compact high quality, low power
audio codec for portable applications, including the functions of A-to-D and D-to-A conversion, channel filtering, microphone and line interfacing and signal mixing.
Line in/out and Microphone Amplifiers are included offering a complete coverage of most common analog interfacing.
Individual volume control schemes allow maximum flexibility on combining different record and playback functions.
The master clock can be 256 or 384 times the sampling frequency and the I2S Digital Audio Interface allows sampling rates
from 8 to 192kHz, including the popular 44.1kHz, 48kHz, 96kHzand 192kHz audio rates.
The IP features efficient power consumption of only 30mW power dissipation in full operation mode, 10mW in playback mode, 20mW in record mode and less than 10uW in power down mode.
( CI9605tn)
Stereo Audio Codec block diagram
See also (CI9405tn) 24 bit 90dB Dynamic Range 8 to 192kHz Sampling Rate Stereo Audio ADC , 65nm CMOS, supplied at 1.8V, offering sharp HI FI quality on an extremely compact and low power IP.
Extended Audio functions such as automatic volume control, microphone bias, PLL, etc., can also be included for enhanced audio experience.
Applications: Mobile phones, Still/Video Digital Cameras, Portable Media and MP3 players.
The new (CI2512tm) Step-Down DC-DC Converter in TSMC 90nm is now silicon proven, reducing your risk and accelerating your time-to-market.
The DC-DC switcher converts an input supply voltage with a wide voltage range of Vin=1.7V-3.6V to an output voltage programmable in fine steps within the range of Vout=0.8V-1.4V. Also possible to upgrade it to higher input and/or output
voltages.
The IP has the ability to maintain high efficiency (above 90%) over a large load range using PWM/VFM alternative controls switching at a frequency up to 2.5MHz. It is optimized to achieve optimum efficiency up to a maximum output current of 600mA, with only 0.72mm2 for the DCDC converter alone or 1.1mm2 including internal references, internal regulators, internal clock generator and system power-on-reset. Lower current versions are also available.
The low quiescent current of 100uA is ideally suited for portable systems operating from a battery requiring long standby time.
The soft-start prevents large inrush currents at start-up, while internal current limitation mechanisms protect the circuit against short circuits on the output.
( CI2512tm)
Step-Down DC-DC Converter Block Diagram
Applications: Any SoC requiring voltage regulation with high efficiency, such as MP3 Players/Recorders, PDAs, Mobile Phones, Smart phones and many other portable applications.
Also available in TSMC 0.13um and SMIC 0.13um, this IP will also be available soon in TSMC 65nm and in other tier-one Foundries.
- (2007-07-31) Chipidea Step-Down DC-DC Converter Core Supports 4.2V External Supply Voltage in Generic CMOS Process Using 3.3V Devices
- (2007-06-01) Chipidea Flexible Mixed-Signal IP Platform Architecture Provides Unprecedented Analog Integration
Find more details about our low risk silicon IP solutions at our website
www.chipidea.com or contact us at sales@mips.com.
Best Regards
The Chipidea Team - Your Silicon IP Partner
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