Chipidea Logo July 2007

Dear IP User,

In this issue we will provide the SoC (System-On-Chip) Community with our latest Analog /Mixed-Signal news: With many years of expertise and working with market leaders, we will be glad to help you find and selecting the most suitable IP for your system. Contact us!

"Global Silicon IP Provider" for your DIGITAL TV

When designing your next Digital TV, please consider the broad range of Silicon IP and expertise that Chipidea has to offer (Chipidea Silicon IP in orange - diagram below).

Digital TV general block diagram
Digital TV general block diagram


Latest LINEAR REGULATORS in TSMC 90nm for integrated applications



Chipidea presents a family of Linear Regulators for integrated applications, including a broad offering of silicon proven Low Drop-Out (LDO) Voltage Regulators, to enable the best power management solutions in your System-on-Chip.

Main features: programmable output voltage, up to 300mA output current, low power with external capacitor or fully integrated capless, excellent line and load regulation, low noise and high power supply rejection (PSR).
LDO General Block Diagram
LDO General Block Diagram

Available in TSMC 90nm technology process, Chipidea LDO solutions are:
  • (CI2425tm) Compact LDO Voltage Regulator, extremely versatile e.g. 0.8V to 3.4V Output, 1.6V to 3.6V Input, up to 150mA, for general purpose, targeting a wide range of applications.
  • (CI2480tm) Capless LDO Voltage Regulator; 1.2V Output, 2.4V-3.6V Input; up to 75mA; targeting fully integrated applications without external components.
  • (CI2424tm) Low noise LDO Voltage Regulator; 1.0V to 2.8V Output, 3.0V to 3.6V Input; up to 100mA; targeting sensitive applications requiring a very clean power supply.
Find all information in the Power Management solutions here.

New Audio solutions in TSMC 90nm

The new Chipidea Audio IP family in TSMC 90nm, offers different audio features in different IP answering to your audio needs in every step of the integration process, specifically designed to address different application requirements and different IC cost premises.

(CI7821tm) extremely compact half duplex Stereo Audio Codec, 16-bit, 80dB Dynamic Range ADC, 75dB Dynamic Range DAC, 32 and 44.1kHz Sampling Frequency, specially tailored for cost sensitive medium/low end applications, such as digital still cameras.

(CI7823tm) complete 24-bit / 192kHz Hi-Fi Stereo Audio Codec featuring multiple analog IOs for complete coverage of all analog audio interfaces, while significantly reducing the external components down to 2 decoupling capacitors (Figure below).

(CI8815tm) compact 24-bit / 192kHz Hi-Fi Stereo Audio DAC featuring line, headset and loudspeaker drivers and dissipating only 12mW in playback.

(CI3813tl) compact 24-bit / 192kHz Hi-Fi Stereo Audio ADC featuring line and microphone inputs (both single ended and differential) and built in microphone bias at below 0.9sqmm.
(CI7823tm) Stereo Audio Codec Block Diagram
(CI7823tm) Stereo Audio Codec Block Diagram

Extended Audio functions such as automatic volume control, phantom ground output, jack insertion detection, PLL, etc. can also included offering enhanced Audio experience.

Applications: Mobile phones, Still/Video Digital Cameras, Portable Media and MP3 players.

Highly Integrated Low Noise GPS Receiver RF Front-End

CI10084tg is a highly integrated low-noise RF Front-End for GPS (Global Positioning System) receivers in the L1 band, supporting also Galileo.

Main Features:
  • Designed to work with a base-band IC with or without embedded ADC.
  • Low-IF architecture of 4.5 MHz. LNA included.
  • Low external component count.
  • Fully integrated Fractional-N synthesizer, providing very flexible frequency plan, supporting a wide range of crystal oscillators.
  • System control and status monitoring over a serial interface.
  • Multiple Power-Saving Modes. 1.8V Single supply.
  • Integrated regulators for analog supply.
  • Low power consumption i.e. 19mA (15 mA w/o LNA).
  • Chip Area (with IOs) of 4 mm2.
  • 0.18um CMOS process.
Graphic 4
CI10084tg RF Front-End for GPS Block Diagram


Applications: Automotive GPS receivers, Battery-operated GPS receivers, Mobile phones with GPS receivers.

Most Compact 10-bit/2MHz ADC in 65nm

The (CI3734tn) is a Successive Approximation (SAR) ADC with selectable resolution for use in all kinds of applications. With immediate availability, in TSMC 65nm, this new IP design succeeds various others SAR ADCs in many technologies. Extremely compact, it's the most competitive IP in the market.

Main Features:
  • Selectable resolution; Up to 2.4MHz conversion rate; Selectable output modes; Very Low power; Area: << 0.05mm2.
Applications: auxiliary ADC for housekeeping/monitoring functions in various applications.

Extremely compact Touch Screen Controller IP in 65nm

The (CI7420tn) is a Touch Screen Controller using mature ADC technology. With immediate availability, in TSMC 65m, it's designed in a Low Power flavour especially suitable for battery powered applications that require very low power dissipation.

Main Features:
  • 10-bit resolution; Support to various types of touch screens; Measurement of general purpose and application specific signals; Low power; Area: << 0.1mm2.
Applications: PDAs, Cell phones, PMPs, MP3 Players, Tablets PCs, Smart/multi-function handheld devices.

UMC 90nm certified PHYs celebrate half a year of age

Recently, Chipidea's certified USB High-Speed PHY cores in UMC 90 LL and UMC 90 SP celebrated half a year of age.

The USB Certification for both PHYs (CI12365um) and (CI12323um) granted in November 2006, was considered by several customers to add extra credibility to this IP core. The certified PHYs present excellent results in a silicon qualified and certified platform.

The PHY is available in various configurations, including Single-Port, Multi-Port, with or without OTG functionality.

The PHY is also available in UMC 0.18um, 0.13um technology nodes, and also in UMC 90nm G flavour.

Announcing the new PLL family

Chipidea announces a brand new family of PLL, featuring standard configurations for multiple applications.

The new family, identifiable by the CI19xxx code, comprises a full range of Programmable PLLs divided into the categories General Purpose, Spread-Spectrum and for WLAN baseband applications. The output frequencies are up to 250MHz, 500MHz and 1GHz, with internal reference frequencies ranging between 1MHz and more than 50MHz. These low jitter PLLs feature a reduced area and consumption.

A dedicated development Team can extend the PLL features to suit your specific needs, including fast lock, multiple frequency outputs, deskewing functionality and other specifications.

Currently, the following IPs are available in Chipidea's portfolio:
  • (CI19121kl) General Purpose programmable 250MHz PLL in SMIC 0.13um.
  • (CI19124tm) General Purpose programmable 250MHz PLL in TSMC90nm, Tower 0.18um and 0.13um.
  • (CI19144tl) General Purpose programmable 500MHz PLL in CSM 90nm, TSMC 0.18um and 0.13um and Tower 0.18um and 0.13um.
  • (CI19171tm) General Purpose programmable 1GHz PLL in TSMC 90nm, and (CI19176cn) in CSM 90nm.
  • (CI19374tm) General Purpose programmable spread spectrum 1GHz PLL in TSMC 90nm.
Other foundry processes and technology nodes are under development. Please contact sales@mips.com.

Chipidea in the News...

  • (2007-06-19) Chipidea Marks 10th Year Anniversary By Announcing World's First Analog Intellectual Property (IP) Foundry
  • (2007-06-01) Chipidea's New USB PHY Architecture Support for 1.8V Devices Offers Industry's Lowest Power Consumption for SoC Designers

Find more details about our low risk silicon IP solutions at our website www.chipidea.com or contact us at sales@mips.com.

Best Regards
The Chipidea Team - Your Silicon IP Partner