| Main Features |
| • 0.18 µm CMOS
technology with MiM |
| • 3.3V/1.8 V double
supply operation |
| • Triple 8-bit ADC
with 210MHz conversion ratio |
| • 2:1 Analog Mux
input with programmable bandwidth (up to
800MHz) |
| • High input impedance |
| • Video input signal
amplitude up to 1.0V |
| • Individual gain
control and offset adjustment |
| • Full sync processing
including sync on green |
| • Programmable back
porch clamping (midscale clamping compatible) |
| • PLL Clock Jitter
<10% of the total pixel time in all operating
modes |
| • Programmable pixel
clock phase adjustment |
| • Optional Alternate
Pixel Sampling Mode. |
| • 4:2:2 Output Format
Mode |
| • SPI Controlled
Interface |
| • Low power consumption
< 330mA at 210MHz |
| • Power saving mode |
Silicon
Achievement
