 Silicon Test
The excellent performance featured by CHIPIDEA's dual ADC
CI3261Ba testchip is summarized below. Operated at 50MS/s
from a single 2.5V supply and using its internally generated
references, the DNL and INL figures are below 0.3 LSB and
1 LSB, respectively. In the same conditions, the SNR is
69 dB and the THD of -78 dB, leading to a global performance
of 11.1 effective bits (ENOB). The above results indicate
that CHIPIDEA's dual ADC CI3261Ba can meet the increasingly
demanding specifications required in many emerging broadband
communication systems.
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The CI3261Ba
is a complete dual 12-bit 50MS/s pipelined ADC core exhibiting
exceptional performance in a compact footprint (only 3.96mm2)
and featuring competitive power dissipation (only 180mW).
It is designed in 0.25um, 1P3M, MiM, 2.5V CMOS technology.
This dual ADC is ideally suited for high performance Communications
(e.g.: Multi-Antenna WiFi), and can be used also in Imaging
and Instrumentation applications.
| Main Features |
| Dual ADC |
| 12 bit Resolution |
| 50Ms/s Conversion Rate |
| Differential Input 1.78Vpp |
| 180mW Power Dissipation |
| 2.5V ±5% Power Supply Operation |
| Core cell Area: 3.96mm2 |
| Low latency of 5 clock cycles |
Block Diagram
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